Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorUsing SDRAM
Hi guys, am really new to NIOS and Qsys/SOPC. I am doing a project where I would need to send an image from the PC to FPGA and save it in SDRAM, then read the image from SDRAM to do image proce...
Altera_ForumHonored Contributor
Honored ContributorI am using basically the same technique. I get data directly from MAC, write it to SDRAM using my own memory master, then read the data using another memory master. The same chip is also connected to the Nios cpu, so the interconnect successfully arbitrates between required data buses.
So the answer is YES, You better change the components to operate using Avalon-MM bus.
