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Altera_Forum
Honored Contributor
Honored ContributorUsing SDRAM on a DE2
Hi all,
I'm rather new to FPGA development, and Im having trouble finding a megafunction for the SDRAM for my DE2. I see there is something for it in the SOPC builder, but that's no help to me as far as I can tell. Im a little confused that there is nothing included from Altera for this purpose. What would you do to instantiate an SDRAM controller? Thanks, - John14 Replies
Altera_ForumHumm.. they say that you can instantiate the controller with SOPC or NIOS II (a friend was succesful using the SDRAM with NIOS II) but you have to change the default data width..
Maybe this helps: http://www.altera.com/education/univ/materials/boards/unv-de2-board-faq.html http://www.altera.com/education/univ/materials/manual/labs/tut_de2_sdram_vhdl.pdf http://www.altera.com/education/univ/materials/manual/labs/tut_de2_sdram_verilog.pdf I'm reading the first pdf (at bottom) of this page: http://www.altera.com/products/ip/iup/memory/m-alt-ddr2_sdram.html and it's very interesting.. :) I think there's a solution.. Hope It helps- Altera_Forum
Sorry, I didn't see your post before I posted again. Thanks for the reply.
Building my own controller is out of my experience. I've found a few controllers, but they have to be edited to work with the DE2. Im coming at this from a software background, so thats going to take me a while to figure out. I was hoping that, since it is an educational development board, there would be a simple way get a controller onto it. - Altera_Forum
Maybe I should clarify a bit. I am a masters student attempting to implement some algorithms on the FPGA as part of a research project. Large data vectors are involved, which leaves me with no choice but to use the SDRAM memory on the DE2 board. Is there a simple way to instantiate a controller for this? Google isn't helping out too well. :)
8MB (1M x 16bit x 4 banks) 2-2-2 100MHz SDRAM - Altera_Forum
Hi, I have the same problem, I read the datasheed of the SDRAM and found the State Machine Diagram very confusing (and hard to implement).
You can try to make your own function to control the SDRAM following that diagram, but you have to be very careful with times... Also, I found somewhere on Altera's web page (can't remember where) a function that someone else did, didn't try it myself, but maybe that's the solution. I hope it helps.. :)
