Altera_Forum
Honored Contributor
13 years agoUsing PLL to synchronize Data stream on Cyclone III
Hi everyone,
I have a 125MHz asynchronus NRZI bit-stream as an input into my FPGA. I want to sample this bit-stream and make sure, that I sample each bit once and correct. Can I use the NRZI bit stream as the reference-input to a PLL to phase-allign the generated clock to the data and then sample it with a Flip Flop on the falling edge? Thank you very much for your help