Forum Discussion
New ContributorUsing PHY with RMII interface on Cyclone V SoC
Hi,
I checked HPS EMAC spec as per attachment.
RMII is not supported in Cyclone V SOC. Yup, you need to write your own adaptor design if you insist to use it on CV.
Alternatively, you can switch to Arria 10 SOC or Stratix 10 SOC that support RMII.
Thanks.
Regards,
dlim
Regular ContributorHi,
I checked HPS EMAC spec as per attachment.
RMII is not supported in Cyclone V SOC. Yup, you need to write your own adaptor design if you insist to use it on CV.
Alternatively, you can switch to Arria 10 SOC or Stratix 10 SOC that support RMII.
Thanks.
Regards,
dlim
New ContributorThank you for your reply.
Yes, it seems like I have to write my own adapter. Unfortunately Intel doesn't have an IP (like the GMII-to-RGMII Adapter) for RMII adaption, I guess most PHYs today are Gigabit devices.
Although it is not too complicated to write an MII-RMII adapter it is always some work related to the bit details, timing and tests, and there also has to be a communication link between the emac core and the adapter to switch between the 2.5M and 25M clock to support both 10Mb and 100Mb.
/AD
