Using output pins to heat up CycloneIII

OK point, I'm not doing simple tests on my IP core but for a number of (strange) reasons I want to keep the Tj stable and compensate the ambient temperature variations.

Since variations in Tj causes variations in propagation delays (that basically I need to keep stable) I monitor the FPGA temperature using a ring oscillator and through a PI controller I close the loop. The subject of this post is the actuator.

As I previously said, I have already built one of this but in order to get significant temperature changes I need to use a lot of gates and this cause a lot of noise in chip.

I know, this is not the conventional use of FPGA, but it work quite well and it is compact and cheaper than others solutions:D.

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for a number of (strange) reasons I want to keep the Tj stable and compensate the ambient temperature variations.

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Have you considered an external solution? Eg., a heatsink with a heater (MOSFET+power resistor) or peltier cooler?

Cheers,

Dave

I think achieving a constant Tj temperature using a heat generator design will be difficult if you want any other temp besides whatever it hits when it reaches steady state. Some thermal chambers will let you put a probe on the device and it'll monitor it and try to keep the temperature as constant as possible.

A pelt like dwh suggested might work well too if you get the voltage right. You'll want to get a thermal probe in between it and the device since if you don't figure out the thermal resistance ahead of time you might be surprised with the temperature you end up with. Don't let the name 'cooler' throw you off, they can cause a chip to get very hot under the right conditions (or wrong conditions if you wanted to cool the part :)).

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Have you considered an external solution?

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Yes, on the board that I design there is a predisposition for a PWM controlled fan. Certainly it with an heatsink, is the effortless solution.

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Some thermal chambers will let you put a probe on the device and it'll monitor it and try to keep the temperature as constant as possible.

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With the embedded ring oscillator I can measure the internal temperature, since the output frequency varies with the temperature. For the current realization I have a frequency of 122MHz, which varies of 500kHz with a deltaT of 4K. This is measured with an external temperature of 26°C, but considering the power dissipated by the FPGA almost constant, it can be related through the thermal impedance with the Tj.

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I think achieving a constant Tj temperature using a heat generator design will be difficult if you want any other temp besides whatever it hits when it reaches steady state.

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With the current implemented heater (lot of ring oscillators with enable), using a nios which read the RO "temperature sensor", compare it with a setpoint, implement a PI regulator and with a PWM enable less or more the RO "thermal actuator", I can compensate for about 7K of ambient temperature. This second data is obtained also with the help of an external temperature meter (a DS18b20).

So the whole system works, the FPGA will be mounted into a laboratory instrument so the variations of ambient temperature are not very high (OK 7K is a little small, surely I can improve it adding more RO but already now the induced noise is high so I have to find another heater).

But, as a matter of curiosity, returning to the first post, is it right that the maximum current constraint is not respected by the FPGA? And someone has experience of short circuit OCT pins to ground:D? I know is not in general a good practice but If absolute maximum ratings are not exceeded why would not it work?

Thanks for reading and answering my weird questions.

Ale.