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Altera_Forum
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15 years ago

using lvds

G´day !! I´m using an ADC with differential output (LVDS). It´s a device including 8 ADCs with Serial LVDS output. Data from each ADC is serialized and provided on a seperate channel. This seri...
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Altera_Forum
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10 years ago

Hi josyb,

Thanks for you reply.

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delivering two 14-bit samples every other base clock,

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Is here should be 7-bit?

Do you have some thought about the synchronization among channels and devices?

Can i use internal system clock as the shift-regiters clock? And the ADCs' DCO signals can't be routed to FPGA?