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Altera_Forum's avatar
Altera_Forum
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12 years ago

User POR?

I need something to use for a Power On Reset with the Cyclone II SDK. There is no external hardware POR input. Are the programming status signals CONF_DONE or INIT_DONE available to the user? Any ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Its pretty common for the development kits to have push-buttons, some even label the net for one of the push-buttons as cpu_rstN.

You can code HDL without a reset source, you just have to make sure you initialize the signals correctly, eg., 


signal count : unsigned(WIDTH-1 downto 0) := (others => '0');
...
process
begin
    if rising_edge(clk) then
        count <= count + 1;
    end if;
end process;

The FPGA/CPLD configuration image will implement that initial condition.

Cheers,

Dave