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The first FPGA communicates with a remote processor (microcontroller) being integrated in its memmory space. The microcontroller has a serial connection with a PC.
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Sorry, can you be a little clearer. The hierarchy of machines is:
1) Control PC, with a serial connection to the first FPGA.
2) First FPGA - with a microcontroller in its memory map, and a serial connection to the PC
3) Second FPGA - black box, with parallel flash connected to it.
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It is a parallel flash what has to be programmed... but the second FPGA is a blackbox for me (I have no documentation at all... and no posibility of programming anything in it other than blindly...). The only communication between the FPGAs is the JTAG connection and some information buses for the operation the second FPGA does.
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If its a black box, how do you know what the JTAG protocol is and that you can program the flash? Perhaps you mean its a design that you cannot change, but you do know that it contains a JTAG-to-Avalon-MM bridge, and you do know the memory map.
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The problem is that, in my opinion, I can only perform the update operation by generating the same stream as the computer would do directly with the JTAG...
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So how are you doing that now? Via JTAG connected to both the first and second FPGAs, or just to the second FPGA?
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for this I would need some kind of help interpreting what is in the .flash file (has it got headers or any information I should not directly copy through the JTAG?)
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What is producing the .flash image? What is it for? Read it with an editor in binary mode.
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and also about the protocol the altera programmer uses...
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There are several protocols that is could be using; it depends on what the logic is in your black box. You can read the HUB_INFO and the NODE_INFO from the JTAG interface to determine what components exist in the design. See the SLD Virtual JTAG guide, and
http://www.ovro.caltech.edu/~dwh/correlator/pdf/vjtag.pdf (
http://www.ovro.caltech.edu/%7edwh/correlator/pdf/vjtag.pdf)
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I have searched quite a lot in the documentation but I was not able to find anything useful.
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There is some information in the Altera docs, other information on the web, and ultimately information you need to gather with a logic analyzer.
Cheers,
Dave
Honored Contributor
