USB: FPGA to host communication - the same old story

Hello,

I have VS2010. Where to find some description of the jtag_atlantic.dll with examples ?

Regards.

Pavel.

Please help me now!

I have a JTAG UART in my system designed with SOPC Builder! Now I want to send data from my DE1 Board to my PC by the USB Blater! What should I do??:cry:

Okay, I just placed the reset signal with the pin planner at a Push Button!

What is the next step?

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critisim = on]

Nice Name? - Depends on the point of view! To be honest, I usually kick out people with such "intelligent names" from forums I have to moderate!

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[advisory mode = on]

I guess you might have more acceptance and maybe also more support from people, by selecting a name with more sensibility.

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OK, I understand your point of view. However, let's concentrate a little bit more on the topic here please!

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Did you progress with your tries to communicate with the FPGA-board?

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Look at the my post above yours. This is still my current progress.

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I started to establish a discussion regarding UDP , maybe you want to participate?

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OK, please post the link!

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Yes I forgot the 's' in my username, but in german everyone knows what it means. Nice name, isn't it?:D

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[critisim = on]

Nice Name? - Depends on the point of view! To be honest, I usually kick out people with such "intelligent names" from forums I have to moderate!

[critisim = off]

[advisory mode = on]

I guess you might have more acceptance and maybe also more support from people, by selecting a name with more sensibility.

[advisory mode = off]

Did you progress with your tries to communicate with the FPGA-board?

I started to establish a discussion regarding UDP , maybe you want to participate?

Hey guys!

I have designed a simple SOPC system out of a JTAG URAT and a JTAG to Avalon Master Bridge module. I connected the Avalon Memory Mapped Master of the Bridge to the Avalon Memory Mapped Slave of the JTAG UART. Both modules are running with a 27,0 MHz clock and the r/w FIFO of the JTAG UART is 16 bytes deep. After generating I set the generated sopc_system.v as the Top-Level Entity. The system needs two inputs now: a clock input and a reset input. I have assigned the clock input to the 27Mhz clock on my DE1 Board (PIN_D12). However I can't reset the module, because I haven't assigned the reset input to a pin. I actually need another Top-Level Entity which controls the sopc_system!? Please correct me if I'm wrong!

Now I have installed vc++ and I was able to compile a simple programm, which sends a "Hello" to the Board via jtag_atlantic.dll and USB Blaster.

Does anyone know a design example for my DE1 Board to receive the data and write it into a FIFO or whatever? If not, I think in SOPC it's not hard to create a JTAG module, isn't it?:unsure:

Best regards,

scheisekaufen

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altera_jtag_to_avalon_mm_tutorial.pdf is a nice tutorial, but the communication based on quartus_stp, that's annoying!

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The tutorial shows how to use both quartus_stp and SystemConsole. The server can run on either of these interfaces, and then you can write a C client application. You can't really ask for more options than that!

What is annoying is that Altera does not provide an API to call directly into a library for JTAG access.

Cheers,

Dave

I donwloaded vc++ 2010 express, but the installer always fails on installing it. It doesn't say why it fails, that's really annoying. Now I'm installing some windows updates and hope that it works.

Yes I forgot the 's' in my username, but in german everyone knows what it means. Nice name, isn't it?:D

You can download VC++ Express for free from Microsoft. It should have all the features you need.

BTW: did you forget an 's' in your user-name? For the non-german-speakers it means buy****, the forum S/W thinks it is quite rude as it doesn't display the translation :D