Forum Discussion
111 Replies
- Altera_Forum
Honored Contributor
A RAM1port needs address inputs to decide what data to access. A fifo just gives you the first one (remember: first in, first out).
So, a FIFO looks just like any other register of your periphereal, but queues incoming or outgoing data. That's why it's your choice here. - Altera_Forum
Honored Contributor
I see... so it is not suitable to use ram1 port, as it will be mem to mem transfer, am i right?
so, for FIFO, if so, is it like transfer one data at a time? - Altera_Forum
Honored Contributor
1. yes.
2. no. The reason for the fifo is that you can wait for a number of values to be processed, and fetch them all in one DMA transfer. - Altera_Forum
Honored Contributor
i see.. thanks... besides how do i know how many number of values already being processed and will be transfer by dma?
- Altera_Forum
Honored Contributor
have a look at usedw / usedr.
(Take care that these might be one bit too few, depending on configuration) - Altera_Forum
Honored Contributor
ok. will try it later... might ask u if encounter problem..
- Altera_Forum
Honored Contributor
I have read through the pdf regarding FIFO. I have a few questions.
1. I need 3 FIFO, for data x, data y and result, am I right? 2. Once i have all the 3 FIFO, how do i integrate them with my peripherals? 3. Since there is no address in FIFO, how does DMA transfer data from it? - Altera_Forum
Honored Contributor
1. yes.
3. how are you doing it now? I suspect you have one register for each value? 2. drop the fifo between the avalon and your periphereal. You will need to implement the read and write signals on the periphereal side on your own. at the avalon side you can connect what you already have. - Altera_Forum
Honored Contributor
yes, x, y and result have FIFO each respectively... besides, since i am using dcfifo, i have 2 clocks, trclk and rvclk. what are trclk and rvclk? is it connect to main system clock, clk?
- Altera_Forum
Honored Contributor
If your periphereal does not use a different clock, you might use a scfifo.
It might increase resource usage to use a dcfifo and connect both clocks to the same system clock, but yes, that should be no problem.