URGENT: Peripheral to Memory DMA Transaction

For Avalon-ST the typical minimal signals are data, ready, and valid. You connect a ST source (provider of data) to a ST sink (receiver of data). The data transfers between the source and sink when valid (from source) and ready (from sink) are both high. So if you have a component that provides/accepts a stream of data then ST is probably your best choice for an interface.

There are three DMAs discussed in this thread:

1) DMA on ACDS (old DMA that only supports MM transfers)

2) SGDMA on ACDS (DMA that supports MM and MM to/from ST transfers)

3) mSGDMA design example (hybrid of# 1 and# 2.... kinda)

All three DMAs are not software compatible so before choosing a DMA make sure you are picking the right one for the task. So figure out what interface your custom component is going to use first then pick the DMA that makes the most sense to pair up with it. Also consider if you need scatter-gather or if having the CPU starting up the DMA for each transfer is sufficient for what you are doing. # 1 and# 3 have similar usage models whereas# 2 in my opinion is very different and the most difficult to program software around it. We won't be able to make a recommendation until knowing more about what your requirements are.