Unexpected Output in Simple Configuration

Hello,

I am working with a TI TSW1400 board, which has a Stratix IV FPGA on it. Right now, I am trying to something quite simple. I have a 16-bit counter connected to a 32-bit ROM with 16 address bits. I am initializing the ROM with a pattern that alternates:

FFFF0000 --> 0000FFFF --> FFFF0000 --> 0000FFFF

Its a simple pattern I am using to generate two separate square waves that are 16-bits wide, and 180 degrees out of phase (the first 16 bits are signal A, the second signal B). Every time the counter counts, the square waves should invert. The code I am using is as follows:

counter counter_inst(
	.clock (data_clk),
	.q (signal_address)
);
wire  chA;
wire  chB;
signalROM signalROM_inst(
		.address	 (signal_address),
		.clock (output_clk),		
		.q	({chA,chB})
);
assign sma = chA;
assign sma = chB;

Please note, the output_clk and data_clk are 90 degrees out of phase. Right now, I am taking the first bit of both chA and chB and looking at them on an oscilloscope. However, when I measure the signals I am getting signals that are 90 degrees out of phase, instead of 180 degrees out of phase!

Picture of O-Scope measurement:

http://imgur.com/myc36m7

Does anyone have any insight on why this may be happening?

Thank you!