Understanding Clocks for Arria II

Thank you rbugalho for your insight. Your comments gave me a better understanding of the clock input. I spent some time reading Chapter 5, which brought up more questions than answers.

I understand that there are clock input pins that can drive the GCLK network clocks, but how do I what the input frequency spectrum is? I could not find a Input Clock Frequency Range, in Chapter 5, I did find in Chapter 1, under the PLL Clock Management section :

"Supports spread-spectrum input clocking and counter cascading with PLL input clock frequencies ranging from 5 to 500MHz to support both low-cost and high-end clock performance".

Can I assume that this in my Input Clock frequencies as well?