Forum Discussion
SG0001
New Contributor
New ContributorTX PHY Transceiver clock
Hi. In my project I use Arria 10 FPGA. I receive 9953.28Mbit/s stream on Transceiver and I need to retranslate it with the same speed(no idle). RX clock is not ideal, what is why I can`t use intern...
CheepinC_altera
Regular Contributor
Regular ContributorHi,
As I understand it, you seems to have some inquiries related to re-transmit of data using the same clock domain as the received data. For your information, the GXB refclk would need clean clock. Based on my understanding, you would need to feed the RX recovered clock to an external clock cleaner on board, then feed the cleaned clock back to the TX refclk.
Please let me know if there is any concern. Thank you.
