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mac23's avatar
mac23
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2 years ago

Two MAX10 FPGAs, one sends packets and the other doesn't.

Hello,

I have two MAX10 FPGAs1050DAF484C6GES, I run the same program and execute the same Tcl script to run the ethernet program found here Intel® MAX® 10 FPGA – Single-Port Triple Speed Ethernet and Onboard PHY Chip Design Example. One MAX10 does output the packets out to Wireshark and the other does not, giving an output that I don't understand as shown below. What could be the problem?

Thank you for the help!

8 Replies

  • mac23's avatar
    mac23
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    Running stats_chk the output is this for the MAX10 that does work:
    Addr Name Read Value
    ---- ---- ----------
    0x68 aFramesTransmittedOK 100000
    0x6c aFramesReceivedOK 100000
    0x70 aFrameCheckSequenceErrors 0
    0x74 aAlignmentErrors 0
    0x78 aOctetsTransmittedOK 150000000
    0x7c aOctetsReceivedOK 150000000
    0x80 aTxPAUSEMACCtrlFrames 0
    0x84 aRxPAUSEMACCtrlFrames 0
    0x88 ifInErrors 0
    0x8c ifOutErrors 0
    0x90 ifInUcastPkts 100000
    0x94 ifInMulticastPkts 0
    0x98 ifInBroadcastPkts 0
    0x9c ifOutDiscards 0
    0xa0 ifOutUcastPkts 100000
    0xa4 ifOutMulticastPkts 0
    0xa8 ifOutBroadcastPkts 0
    0xac etherStatsDropEvents 0
    0xb0 etherStatsOctets 151800000
    0xb4 etherStatsPkts 100000
    0xb8 etherStatsUndersizePkts 0
    0xbc etherStatsOversizePkts 0
    0xc0 etherStatsPkts64Octets 0
    0xc4 etherStatsPkts65to127Octets 0
    0xc8 etherStatsPkts128to255Octets 0
    0xcc etherStatsPkts256to511Octets 0
    0xd0 etherStatsPkts512to1023Octets 0
    0xd4 etherStatsPkts1024to1518Octets 100000
    0xd8 etherStatsPkts1519toXOctets 0
    0xdc etherStatsJabbers 0
    0xe0 etherStatsFragments 0

    stats_chk for the MAX10 that doesn't output the packets:
    Addr Name Read Value
    ---- ---- ----------
    0x68 aFramesTransmittedOK 100000
    0x6c aFramesReceivedOK 0
    0x70 aFrameCheckSequenceErrors 0
    0x74 aAlignmentErrors 0
    0x78 aOctetsTransmittedOK 150000000
    0x7c aOctetsReceivedOK 0
    0x80 aTxPAUSEMACCtrlFrames 0
    0x84 aRxPAUSEMACCtrlFrames 0
    0x88 ifInErrors 134042
    0x8c ifOutErrors 0
    0x90 ifInUcastPkts 0
    0x94 ifInMulticastPkts 0
    0x98 ifInBroadcastPkts 0
    0x9c ifOutDiscards 0
    0xa0 ifOutUcastPkts 100000
    0xa4 ifOutMulticastPkts 0
    0xa8 ifOutBroadcastPkts 0
    0xac etherStatsDropEvents 0
    0xb0 etherStatsOctets 285862095
    0xb4 etherStatsPkts 134042
    0xb8 etherStatsUndersizePkts 0
    0xbc etherStatsOversizePkts 0
    0xc0 etherStatsPkts64Octets 0
    0xc4 etherStatsPkts65to127Octets 0
    0xc8 etherStatsPkts128to255Octets 0
    0xcc etherStatsPkts256to511Octets 0
    0xd0 etherStatsPkts512to1023Octets 0
    0xd4 etherStatsPkts1024to1518Octets 0
    0xd8 etherStatsPkts1519toXOctets 0
    0xdc etherStatsJabbers 100000
    0xe0 etherStatsFragments 34042

  • aaronkwak's avatar
    aaronkwak
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    I will answer in passing.

    I think you know, but if you just look at the content and explain it,

    The FPGA sends packets, but the other side does not transmit or is not connected.

    first

    0x7c aOctetsReceivedOK 0

    In this case, the problems are widespread.

    RX link defective (physical)

    Interprotocol Differences

    Destination address issues (MAC Address, etc.?)

    Please try connecting to a board (equipment) that is connected normally.

    It seems like we can find out if the problem is with that port.

    I hope it helps you with your work.
    First, you need to check whether the physical channel problem is normal.

  • mac23's avatar
    mac23
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    I don't think it is physical or the MAC address. I ran the default program on one FPGA without adding its MAC address and it worked. I ran the same program on a 3rd FPGA and that same problem persists.

  • ZiYing_Intel's avatar
    ZiYing_Intel
    Icon for Frequent Contributor rankFrequent Contributor

    Hi mac23,

    I would suggest you check the board by below steps:

    1. All register setting are same
    2. Check signal integrity (cable, condition of plugging, port connection and so on)
    3. Do internal and external loopback testing

    Best regards,

    zying


    • mac23's avatar
      mac23
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      Hi Zying,

      Could you give instructions on how to do internal and external loopback testing?

  • ZiYing_Intel's avatar
    ZiYing_Intel
    Icon for Frequent Contributor rankFrequent Contributor

    Hi mac23,


    Is there any update from your side?


    Best regards,

    zying


  • ZiYing_Intel's avatar
    ZiYing_Intel
    Icon for Frequent Contributor rankFrequent Contributor

    Hi mac23,


    Since no hear any feedback from you, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.


    Best regards,

    zying