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Altera_Forum
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11 years ago

Two CPLDs on one board & ISP

Hi, I am laying out a prototype board that will have two CPLDs on it (a MAX7128S & a 7160S). My intention is that they will be programmed "in system" using a JTAG interface. I plan on...
Altera_Forum's avatar
Altera_Forum
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11 years ago

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Can someone please confirm that this is an acceptable configuration and that no additional hardware, buffers., are needed?

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This will depend on your board layout. For example if your TCK trace goes first to one device, and then has a long trace to the second device, you will likely get reflections on TCK and will have problems with your JTAG chain.

In my opinion, the best solution is to use a buffer at the JTAG connector, and then dual-source terminate your TCK and TMS signals, so that you can route individual traces to the two devices. The TDI->TDO signals would then daisy chain between the two devices. Make sure to include 0-ohm resistors in this path, so that you can break the JTAG chain and skip a device (useful for debug).

Which buffers? TI and Fairchild have parts they call TinyLogic and LittleLogic. These parts are 7V tolerant even when the power is off and when powered from 3.3V, so they offer some protection to your JTAG chain.

Cheers,

Dave