Forum Discussion
Altera_Forum
Honored Contributor
8 years agoHello Robo_Pi,
To start with, you can make your package .vhd file and put it together with the .vhd design using the package in the same project directory. Then, you need to include the package file in your project: Under Assignments / Settings / File, add both files to be included in the project (the packge first). To instantiate an entity defined in the package "bench_help": You can use someting like: work.bench_help.reset_generator(5000,5,CLOCK_50,RESET_P,RESET_N); where the package bench_help is: library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; library Std; Use Std.textio.all; package bench_help is procedure reset_generator(wt : in integer;len : in integer;signal clk : in std_logic; signal reset_p : out std_logic; signal reset_n : out std_logic); end bench_help; package body bench_help is procedure reset_generator(wt : in integer; len : in integer; signal clk : in std_logic; signal reset_p : out std_logic; signal reset_n : out std_logic) is variable i : integer; begin reset_p<='0'; reset_n<='1'; end procedure; end package body bench_help; Best Regards, Johi.