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vmetodiev
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3 years ago

Triple-Speed Ethernet - Verilog TX/RX example

Dear Community, Recently I have been struggling to find a real-world Verilog example for (single) frame Ethernet TX/RX. I have successfully imported and synthesized the Triple-Speed Ethernet IP c...
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vmetodiev
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3 years ago

Hi Pavee,

Yes, exactly, my question is based on the TSE IP and the official example for the Cyclone 10 LP that you have mentioned.

I am able to compile the IP, flash the FPGA over the USB-to-JTAG and run all of the TCL tests from the System Console.

However, I do not want TCL and Avalon-ST.

I need simple Verilog examples on top of the TSE IP, with send/receive FSM funcionality.