tri-state

--- Quote Start ---

I am looking for a Verilog equivalent of a tr-state device (chip-select) on the output pin of my FPGA. I only want to drive a multi-drop bus when selected and go high-impedance when not. What is the easiest way to accomplish this?

--- Quote End ---

Hi,

you can do it in this way:

module tri_state_test ( in, ena, out);

input in;

input ena;

output out;

assign out = (ena) ? in : 1'bz;

endmodule

Kind regards

GPK