Transceiver Rate Match FIFO - Why is it needed?

Some long time ago I designed the front end of a receiver. This is the most difficult part of any communication system. The front end requires two separate functions; one to recover symbol clock and one to track the centre frequency of residual carrier left over and these two functions are related.

The clock recovery is based on a timing error detector(TED) algorithm specific to type of symbols. The TED filtered output is used then in two ways. Either to directly change phase of NCO at ADC and hence track the transmitter clock and this method is easier and does not require any rate matching. Or TED output is used in a fully digital way where ADC sampling is left free running on a rate close to nominal Tx clock. Then a fractional interpolator is used to delay or advance the signal in reverse of error using a fixed system clock close to nominal Tx rate. In this fully digital design the error can go either way. The error is called "Mu" and ranges from 0 ~ +/-1 samples.

If Mu is heading towards +1 then the interpolator heads towards -1 and vice versa. If the feedback does not catch up and > 1 or < -1 correction is needed then one sample of your system clock has to be dropped or new sample recreated so that for example a Mu of 1.1 wraps up to .1 and that of -1.1 wraps to -.1

So I believe you are referring to the case of clock recovery which is fully digital i.e. you have no control over received samples (no control on ADC point) but you recover clock rate from given stream of symbols.

The issue of making your rx clock slightly faster than tx clock will help set the error sense but the drift of oscillators is not always predictable.