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Altera_Forum
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15 years ago

Toggle a Pin in always@() ?

Does the following verilog correctly pulse a reset pin? input [15:0]shadow; input tach; input carry_in; output [15:0]active; output reset; reg [15:0]active; reg reset; al...
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Altera_Forum
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15 years ago

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Does the following verilog correctly pulse a reset pin?

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According to Verilog rules, it doesn't pulse anything, just performs reset=0.

To control a counter and store it's value on a particular event, you better design a synchronous state machine operating with the counted clock.