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Altera_Forum
Honored Contributor
Honored ContributorTo handle interrupt from FPGA PB
Using Quaruts 14.0 on Linux 64bit on Altera's SOC dev kit. There 2 example from Altera that i am using. The Altera-SoCFPGA-HardwareLib-GPIO-CV-GNU and Altera-SoCFPGA-HardwareLib-FPGA-CV-GNU. T...
Altera_ForumHonored Contributor
Honored ContributorSee you all program execution in debugger ? No errors ?
GHRD from Altera may exactly not connect FPGA PBs to interrupt inputs. My FPGA programmer make special design and invert PB values, because interrupts take in on logical 1, and pressing of PB generate 0, 1 in free state. And we don't know, on what input of GIC (generic interrupt controller) is come in our signal -- may be 64 from 72 to 135 (ALT_INT_INTERRUPT_F2S_FPGA_IRQ*) and 207 -- ALT_INT_INTERRUPT_FPGA_MAN_IRQ. I write polling all 0..255 function and see only 71 == ALT_INT_INTERRUPT_DDR_ECC_ERROR_IRQ often :) P.S. Now I handle interrupt from both FPGAs PBs, include .zip with .sof for ALT_INT_INTERRUPT_F2S_FPGA_IRQ23 ?
