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Altera_Forum's avatar
Altera_Forum
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14 years ago

TMR in FPGA circuits against SEU

Can somedy help me to undarstand one thing?Does the triple modular redundant flip-flops in FPGA circuit mean that we change the structure of logic cell?

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  • Altera_Forum's avatar
    Altera_Forum
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    No, it means you use multiple logic elements to implement a single TMR FF.

  • Altera_Forum's avatar
    Altera_Forum
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    And is this multiple logic element a special logic element or a combination of regular logic elements?