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Altera_Forum's avatar
Altera_Forum
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13 years ago

Timing failing on just a few pins

Hi,

I'm working on a project which uses a pair of SDRAMs on a Cyclone III dev board. The design is failing timing on a few pins. I've used the TimeQuest timing report to try and figure out what's going on, and I've attached a screenshot of the report for one of the pins. The delay between IC and CELL of IOOBUF_X11_Y0_N23 seems inordinately large at over 7ns. Any hints on how I might reduce this?

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Answering my own question for the benefit of anyone else who might hit the same issue:

    The problem was that the pins in question are dedicated voltage reference pins. They can be used as regular IOs, but have a higher capacitance, so react slower than other pins.

    The solution is to increase the drive strength on those pins.