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Honored Contributor
Honored ContributorTiming closure
The relevant part of my circuit is shown in figure "figure.jpg". There are two timing violations in my system. Both include one of the counter registers and two states in the FSM. From TimeQuest...
Altera_ForumHonored Contributor
Honored ContributorFast IO registers are only meant for Device Pins. With fast IO registers you cannot have logic before the register. Do some of the inputs come from pins? And if they do, why are they not synchronised to the clock first?
