Actually, I've found out that -exclusive and -asynchronous do the same thing in TimeQuest, they cut timing between clocks in separate groups. The difference is from ASIC land, in that -exclusive means they won't toggle at the same time, and would be used for two clock assignments on the output of a clock mux, or maybe two different clocks that could potentially come in on the same pin. Knowing they won't toggle, the IC tools know there won't be any inter-action such as cross-talk. (Hardcopy designs use this too). In FPGAs they give the same results, although I should change that to -asynchronous since I think it makes more sense. (Personally I would like to re-do a lot of this and make it all flow together.)
One thing I do, although it's not quite as straightforward, is right-click on a name like you have been doing and Locate -> Assignment Editor. Then I just copy the name from there, so I have the full hierarchy, and use it in TimeQuest(including Name Finder to verify it's correct.) If not using the Name Finder and just putting it into a command in my .sdc directly, put it in curly brackets to match the name exactly as entered. Since I don't let Quartus/TimeQuest enter constraints for me anyway, that's the best approach I've found.