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Altera_Forum
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16 years ago

TimeQuest .sdc constraints for EPCS (ALTASMI_PARALLEL megafunction)

Hi all, I'm using the ALTASMI_PARALLEL megafunction to access a EPCS16 device at 25MHz (active serial) on a Cyclone III device. The EPCS16 is 2 centimeters away from the FPGA (very small PCB ...
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Altera_Forum
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15 years ago

amilcar,

I think you need to use set_min_delay and set_max_delay to constrain the output clock ( ALTERA_DCLK) instead of set_max_skew