timequest multicycle path and SQRT

Dear All,

i'm struggling with altera SQRT. I have a design, where the SQRT is driven by 160MHz clock. The data shifted in are however 4 times slower, hence the enable signal to the comes at 25ns period (together with data).

What I'm not sure now is, whether and how I should specify the multicycle condition to the timequest. Apparently, if I do not do anything, the timequest assumes period of 6.25ns for the timing analysis. IMHO this is not correct and it should rather consider 25ns for the timing (which would correctly fit as it takes around 20ns to compute the SQRT).

So I thought to specify multicycle condition. But that is rather complicated as the internals of the SQRT are complaining and I'm not sure how to do it from my own entity, where I use it.

So I was thinking that maybe I could use PLL to generate 40MHz out of these 160MHz and drive the SQRT by this, which would force timequest to use 25ns .... and the entire SQRT as well.

which attempt is more correct?

thinking of this brings me even more mess into the logic of the thing: if the ALTSQRT runs currently on 160MHz, however the data change every 25ns, is this situation considered as "ALTSQRT running on 25ns?" or it is considered as "ALTSQRT still running on 160MHz, but data arrive once per 4 cycles, howevever ALTSQRT must still comply with 160MHz timing"??

any help kindly appreciated...

.d.