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Altera_Forum
Honored Contributor
Honored ContributorTimequest constraints for a dynamically phase-shifted PLL
I've been trying to properly constrain a design that uses dynamic phase shifting of an instance of an altera_pll core that I created. I.e. to enable phase-shifting I checked the "enable access to dy...
Altera_ForumHonored Contributor
Honored ContributorI assert that:
1) Setup and hold times are being met - the timing analysis report says so - for each phase. 2) The shifting and opening of the window was needed and was done properly - for each phase. 3) The bitmaps and my pasted timing constraints support these conclusions. I don't think we have any disagreement, except about the multicycle constraints - do you think they're incorrect? If so, how?
