MinzhiWang
Occasional Contributor
2 years agoThe interconnection between ADC and Cyclone10GX FPGA
Hello Guys, I have posted several threads to ask several questions about new FPGAs for us, which is Cyclone 10 GX FPGA.
Because I can't reply in Intel forum, I want to give my thanks to FvM, thank you very much.
I have to keep ask question with new post, now I have the question about the interconnection between ADC and FPGA. Our ADC is serial LVDS ADC. I remember I asked one question about FCO and DCO, and FvM give us the solution. Now the new question is how to connect FCO and DCO between ADC and FPGA. Do we need to assign dedicated clock pins for them? Or can we just assign normal LVDS differential pairs for them as the samping data output of the ADC?