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OrF's avatar
OrF
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

The Fitter failed to find a legal placement for IOPLL with DIB of Stratix 10.

I got the next Error from the Fitter while trying to synthesis with DIB The Fitter Failed to find legal placement for my IOPLL is there a way to find out which PLL is preferred by the DIB , or ...
  • OrF's avatar
    OrF
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Hi Aqid

    I don't see any relation to my issue with the suggested guideline.

    1. in the document you send , it is about clock/pll which "Feeds" the DIB, in my case the the PLL is Feed by a clock which transfer from the other die via the DIB "Source-synchronous" architecture, the the clock which arrives from the DIB is feeding the PLL ...

    2. more over , if I would like learn from the document you sent , it does not say anything how to choose specific pll. which might solve the Fitter issues.

    if you can please elaborate what did you mean , that I should follow this guideline in my design , since I don't find any relation to my issue, or something I can do.

    Thanks

    Or.