Forum Discussion
AqidAyman_Altera
Regular Contributor
3 years agoHello,
Thank you for reaching out Intel FPGA Community.
This error basically caused by the Fitter cannot place the specified logic element in the design.
Could you share the test case design with us? so that I can try to replicate and isolate the issue.
You can choose to share here or privately.
Just let me know which you prefer.
Regards,
Aqid