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Altera_Forum
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18 years ago

Testing of internal resources

Does anyone have a simple code set for testing internal FPGA resources to aide in creating a BIST type test methodology. Something like a LUT based Pattern generator, the block to be tested (LU...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

The full testing is understood. My end customer desires to be able to do something similar to BIST to be able to certify that a particular chip is in good working order before inserting the payload design.

The customer is always right.

Thanks,

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