Targetting different FPGAs with NIOS II Design
I have a processor design that was generated using Quartus II 4.1, targetting a cyclone device. Recently I designed a board that used a cyclone II 2c35 and built the processor into the device (simply copied the appropriate files into the new project). This worked fine and the processor ran with no problems. I have just designed a board that uses a cyclone II 2C5 and when I fit the processor into this device I get strange problems. Depending on changes to other logic within the design the processor stops running. On sum builds the processor fails to run at all and on others it will run for a period and then stop. The build is reporting no timing errors so I am unsure what is causing this. I unerstand that the processor was generated unsing an old version of quartus specifically for the cyclone but this design works fine for the 2C35 so why not the 2C5. I have avoided re-generating the processor as I then run into problems building the code for the new processer in the latest version of IDE as the lwip has changed. Anybody have any suggestions?