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Altera_Forum's avatar
Altera_Forum
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14 years ago

System ID issue

Hi everyone, I am working in a project using Quartus v11.0. The Bsp was created using Qsys. *obs: The project was updated/converted from SOPC Builder to Qsys... So, I am having pro...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

You could try and clean the project (delete the db and incremental_db folders, and all the generated .sof, .ptf and .sopcinfo files) and recompile in the right order: QSys, then Quartus, then software (clean project + compile). Then upload the configuration in the FPGA (and check if you should upload a _time_limited.sof instead of the regular .sof) and finally the software. I don't know any other way.