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i went ahead and recompiled and triggered on TX and saw the usb rate from nios was different that what putty was kicking out. I tried adjusting the baud rate in the device manager/properties, but that does not change the bit rate on the signal tap. So, i started adjusting the rate on putty to match the trace on the signal tap. And at 24000 baud, things started working. So you were right.. its baud rate.
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Ok, good, that is progress :)
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1)why the driver settings have no effect on the rate
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The Windows driver for the FTDI USB-to-UART pin *will* have an effect. You will only be able to see that effect if you type a character into Putty and observe the transmit pin from the FTDI device, which is connected to the RX on your FPGA UART, so you have to trigger SignalTap II off that signal.
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2)the qsys parameters on the usb uart are at 9600
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Its quite possible that this only works correctly if you have the Qsys clk frequency set correctly. The default is 50MHz, so if you are actually connecting the Qsys clk input to a different frequency, then your Qsys clock frequency setting is wrong. If the Qsys UART _hw.tcl script uses that clock frequency to calculate divider settings, then they will be wrong.
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i think there are baud rate multipliers somewhere that i might have to set.
any ideas on where to look would be great
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The NIOS II software API for the UART should have functions for you to access. You really need to read the user manual for the Qsys UART component.
Cheers,
Dave
Honored Contributor
