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Altera_Forum's avatar
Altera_Forum
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11 years ago

system console, external memory, multiple masters

Hi guys Im fairly new here. Im working with a cyclone V GX board and have used qsys to add a memory controller in my nios code to control some lpddr memory on the eval board. Im u...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hey Dave

I see what you mean about the master_write_32 vs master_write_memory speed. wow. big difference!! thanks for that tip!!

but, the other reason im writing back is that even though ive added the jtag avalon memory master, the nios still doesnt see whats written in the lpddr mem on my board.

Can you look at my qsys diagram and see if im missing something?

Im going to try connecting the master port of the MM to the debug_mem_slave of the nios to see if that helps. im still a little fuzzy on when/when not to make connections in qsys.

thanks!!