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Altera_Forum's avatar
Altera_Forum
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11 years ago

system console, external memory, multiple masters

Hi guys Im fairly new here. Im working with a cyclone V GX board and have used qsys to add a memory controller in my nios code to control some lpddr memory on the eval board. Im u...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I haven't tried either of the methods you're using, so cannot comment on what I'd expect to see. The only time I use the JTAG master embedded in the DDR controller is to run the DDR memory interface toolkit for sweeping the memory interfacing timing margin.

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Ill try adding the jtag to avalon mm master in there and report back

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I know for-sure that this will give you the results that you want.

Cheers,

Dave