synchronization problem

This is typically how I do it for slower date rates. But it has a couple of requirements:

1: your sampling clock must be >> that your data rate.

2: You know the data rate, and the accuracy in the data rate vs your sampling data rate is close enough that it will insure proper sampling throughout the packet.

3: You have a reliable means of detecting the start of the packet. (Either through start/stop bits, preambles, etc).

With a data rate of 25 MHz, I would want a sampling clock in the 200 MHz range, so that I can insure I'm in the center of the bit. You can use each transition to re-time your sampler to make sure you stay within the center of the bit, but if you have long sequences of 1's or 0's you could end up with problems if your effictive sampling data rate and transmitting data rate have any significant skew.

Pete