switching between CMU PLLs 0 and 1

Finally figured it out by attrition :mad:.

I still don't know if there is an easier way to switch between CMU PLLs but here is way I did it.

1) You setup a gxb reconfig block, a gxb block and two roms.

2) There is enough information in AN558 to allow you to setup the reconfig block and the gxb.

3) The part I was missing was I had setup the gxb with a main pll and alternative pll and I thought you could just switch between the two some how. What you need to do write out a .mif with the PLL settings you want the gxb to listen to initially set as the main pll. For example set main pll as 108 MHz clock and the alternative pll setup as a 162MHz clock. You then create a second .mif with this switched over so main pll is now 162MHz clock and alternative is 108MHz clock. Making sure that when you switch them over, the logical number and the input source of the clock follows it. So I set the 108MHz as having a logical number of 0 and input port 0. When I switched it over to the alternative pll, these numbers followed the clock.

4) Put the .mifs inside roms and connect them to the reconfig block using a mux on the data. Use a signal to select between which clock you want.

5) The last thing to do it is set pll sel mode to 100 or 101. Mode 110 doesn't do anything when you try and reconfigure the PLLs. I think mode 110 is for switching over the plls but I just don't know how to control that mode.

Hope someone else finds this experience useful :)

C