Rk_Athram
Occasional Contributor
Occasional ContributorSupporting DDR4(MTA72ASS8G72LZ ) for 10AX057N3F40E2SG
Hi,
Does DDR4 MTA72ASS8G72LZ will support arria10 FPGA(10AX057N3F40E2SG ) ?
Forum Discussion
AdzimZM_Altera
Regular Contributor
Regular ContributorHi,
I am highly recommends to check the specs in EMIF Spec Estimator webpage. Link: https://www.intel.com/content/www/us/en/support/programmable/support-resources/support-centers/emif-spec-estimator.html
I have quickly checked with the EMIF Spec Estimator for Arria 10 GX -E2 device. The device can support LRDIMM memory format with 1DPC 4 ranks memory topologies.
Please let me know if you have any concern.
Regards,
Adzim
Rk_AthramOccasional Contributor
Occasional ContributorHi,
Thank you for the response.
MTA72ASS8G72LZ is 2666Mhz, as per Arria10 device it will support maximum of 2400.
so we have chosen to work with 2133Mhz.
From EMIF existing template we have matched timing data with data sheet it was proper.
As latency and timing are downgraded/taken with respect to 2133 speed.
serial presence data for LRDIMM, default values(which are accurate with template) should be consider exiting values
SPD byte 137 : 0x65
SPD byte 138 :0x05
as per datasheet (https://in.micron.com/products/dram-modules/lrdimm/part-catalog/mta72ass8g72lz-2g6)
SPD byte 137 : 0x75
SPD byte 138 :0x0A
| MTA72ASS8G72LZ-2G6B2 | 137 | DDR4-REG OUTPUT DRIVE FOR CONTROL | 75 |
| MTA72ASS8G72LZ-2G6B2 | 138 | DDR4-REG OUTPUT DRIVE FOR CLOCK | 0A |
So the question is
Which SPD values we needed to set in IP?
do we need to go with Datasheet or template values ?
what will the effect on data transfer/reception ?
Regards,
Rajesh
