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Altera_Forum's avatar
Altera_Forum
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12 years ago

Stratix iv EP4SGX530F device experiencing high speed failures with loop back testing

We are manufacturing a board with a ep4sgx530nf45c2n Stratix IV device and our customer is experiencing 50% failures while conducting a loopback speed test. The failures are occurring at around 80 picoseconds. We have been building this board for several years and have not had this issue in the past. We have verified our solder and IR profile is the same. Has anyone seen any similar issue?

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    How confident are you that the FPGA design was originally designed and, more importantly, constrained correctly? Is this your customers domain? Are you happy the board is being built with the parts of the same speed grade (the final "2" in the part number) as originally specified?

    It's possible that the newer parts you're building with don't perform as well as they used to. They will not be out of spec, just closer to the limit. As a device gets more mature (which I'd suggest your device is) the binning of the devices by the manufacturer get more refined. This allows more parts to pass as higher speed grade parts, higher value, with less margin.

    So, if the design was poorly constrained originally you may have had the problem hidden from you. Now with the newer parts your receiving, with tighter margins, the design has revealed it's shortcomings.

    If you're confident in your own manufacturing process then I'd suggest this is the question to ask of whoever it may concern.