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I inadverently
connected both nCS and nCSO together and are tied through a 10K
resistor to 3.3V. Would that cause any problems?
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Perhaps. nCS should be held low. This 'selects' the first device in the JTAG chain. When that first device finishes configuration, then it asserts nCSO to the next device.
The question is whether nCSO is tri-stated by the FPGA, or driven high. You'll have to look that up in the data sheet. If it is driven high, then nCS will be high at power-on, and your device cannot configure. Actually, since you have a pull-up, it will be high regardless. That would be a problem.
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I checked the voltages on the 10pin header used for AS mode without
the USB blaster cable. Is 2.3V correct for pins such as nCS (pin 8)?
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I would have expected 0V.
Cheers,
Dave
Honored Contributor
