Forum Discussion
LHinC1
New Contributor
6 years agoStratix 10 PHYLite avalon bus avl_readdata seems to be synthesized away
Hi Altera AE ,
We are working on a design on Stratix 10 using PHYLite library.
We previously use Arria 10 PHYLite in our last project, it was smooth and we didn't encounter any pr...
Rashmi1
Occasional Contributor
5 years agoHere are few links:
Latest document : Intel® Quartus® Prime Design Suite 18.0
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_gs_msa_qii.pdf
- LHinC15 years ago
New Contributor
Hello Rashmi,
Thank you for the document.
We read these 2 PDF files before, but it seems they are only valid for v18.0.
The user interface has changed a lot in v19.3 and v20.2.
Is there any document updated which is for v20.2 ?
Thanks,
Samson