Stratix 1 to Arria V conversion
I've been tasked with converting a 10 year old Stratix 1 design (EP1S25F672I7, Quartus 3.0, SP1) to a Arria V design (5AGXBA1D4F27I5, Quartus 13.1). So, I have to deal with migrating to a different device family and a large leap in the Quartus tool rev. Is there a automated way to do this conversion so I'm not manually re-entering pins, constraints, etc? The original design does use some Altera macrofunctions so I will probably need to update these library functions (.TDF files) but found an app note saying pre-12.0 functions will not automatically update. I assume I would have to identify the files and do a manual add/replace files to target the newer library functions? Any special re-compile need to be done after this? Also looks like a .SDC file is needed for timing constraints but the older design does not contain that file, so how does this get generated? Bottom line is I'm looking for design flow for the steps to make this conversion. I haven't worked FPGAs in about 10 years so I'm the old dog trying to learn new tricks. Thanks, Joe