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Honored Contributor
Honored ContributorStrange effect with Stratix FPGA
Hello! I am using a Stratix EP1S10 device on a NIOS II Development Board. I use it for VHDL programming only. That means, I don't use any NIOS stuff in my project. I made my own user configurat...
Altera_ForumHonored Contributor
Honored ContributorHello again!
For those, who are interested: I solved the problem with the continuous rebooting. The case was, that my design is apparently so complex, that the voltage source of my board gets overloaded. The effect with the rebooting occurs, when I brought the UART IC to working with the assignment of pin U21. That must have been the last straw for the power supply. I have a power supply monitor IC on my board which forces the board to reboot, when the voltages become incorrect. As I need the UART at all costs, I decided to reduce the depth of my shift register, which solved the problem. Now, my board works stable, and as good, as the simulation predicted. The only issue still left is now this cursed 7-segment dot on D19 . . . Anyway, this seems to have no bearing on my design . . . Greets Maik
