Strange effect with Stratix FPGA

Hello!

Well, as this is a devlopment board, I am using, there is no way for me to add a pull up resistor on it. What is strange to me, is that it only occurs, when I add a more complex logic besides my shift register. If i remove this logic, the D19 pin is steady off.

Now, I have an additional and even more dramatic problem with the serial interface on my board. I added some logic to use the serial Interface as UART to communicate with a PC. All works fine in the simulation, and on the board, as long as I don't assign the TXD pin in my design. I repeat, because this is very strange to me: I have a configuration running on my board, which works, as far as I can say, without any problems. Then, I assign the pin (U21) as TXD pin (because the documentation of my board says it is connected there) WITHOUT changing any of the VHDL files. After that, my board allways boots again and again and again. Booting means, that the user configuration is reloaded over and over again. In between the reloads, it sends correct data over the UART, but I don't know, what makes the board do that crazy rebooting . . .

Thanks also for the additional information about the shift-register issue and the Signal Tap! Unfortunatly, my primary goal is to solve this rebooting problem . . .

Maik