Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorStrange behavior with On-chip Mem
In my simulations, some memory reads are next cycle, some are in two cycles, which is causing problems. Shouldn't it always be a consistent single-cycle with on-chip mem? I've attached a screen shot....
Altera_ForumHonored Contributor
Honored ContributorThis is weird. If it is supposed to take more than one cycle, I would expect waitrequest to go high, but it isn't. What is the slave component and what are its properties/parameters set to?
