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Altera_Forum
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11 years ago

strange behavior of DCFIFO, how to meet the "Functional Timing Requirements"

Hi, My DCFIFO on Cyclone V is broken. Data is lost. depends on FIFO type, MLAB or M10k, data corruption is severer as FIFO larger. I wrote to DCFIFO like this: if(~fifo_fu...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

thanks Kaz,

yes, the code is in the always@(posedge clk) block.

So, you mean the following?

wire fifo_wrreq;

assign fifo_wrreq = ~fifo_full;

But, how to add the fifo data?

fifo write data has to be registers.