State of Unused I/O pins and design of isolation filter for Cyclone IV FPGA

The amount of decoupling is very design dependent. You can use the power distribution network (http://www.altera.com/technology/signal/power-distribution-network/sgl-pdn.html) tool to find an optimal distribution. Alternatively if you find a development kit that uses the same FPGA than you, you can copy the decoupling distribution from the kit's schematics, there is a good chance it will work with your design too, just maybe overkill.