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Altera_Forum
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13 years ago

State of Unused I/O pins and design of isolation filter for Cyclone IV FPGA

Hello there, Reference: Cyclone 4 EP4CE10 FPGA I m developing a prototype board with minimum peripheral say 4 slide switches, and 4 LEDs, with a 40pin GPIO, with program persistance throug...
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Altera_Forum
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12 years ago

The amount of decoupling is very design dependent. You can use the power distribution network (http://www.altera.com/technology/signal/power-distribution-network/sgl-pdn.html) tool to find an optimal distribution. Alternatively if you find a development kit that uses the same FPGA than you, you can copy the decoupling distribution from the kit's schematics, there is a good chance it will work with your design too, just maybe overkill.